Synopsys announced Wednesday it will build an artificial intelligence model with OpenAI that does something general-purpose chatbots can’t: actual chip design. The two companies will share revenue from the product, called GPT-Synopsys, and Synopsys shares rose as much as 7% after the announcement. The company also raised its fiscal 2027 revenue-growth forecast to 15%, above the 11.19% analysts expected, according to LSEG data cited by Reuters.
GPT-Synopsys will be trained specifically to operate Synopsys’ electronic design automation software — the industry-standard toolset engineers use to turn circuit descriptions written in code-like hardware languages into the physical layouts of billions of transistors on a sliver of silicon. OpenAI co-founder Greg Brockman said in an announcement video that the model should let engineers work through design trade-offs and optimizations faster, “to be able to shave off weeks, months from the design process and to bring more chips to the world.”
The commercial terms are unusual for an AI partnership. OpenAI will pay Synopsys a training subscription fee for the privilege of learning how to use its tools. When Synopsys customers use the finished product, the two companies split the revenue — and the split depends on how much the model actually improves a chip’s design, Synopsys CEO Sassine Ghazi told Reuters in an interview.
GPT-Synopsys: the OpenAI chip design model trained on Synopsys tools
The deal is a multi-year collaboration, and it goes deeper than licensing data. GPT-Synopsys will run on OpenAI infrastructure and is being built to reason about design and verification workflows while directly operating Synopsys tools, according to The Decoder. Early testing with semiconductor customers is already underway, and the companies plan to market the product jointly.
That’s a meaningful escalation. Today’s AI coding assistants can summarize logs, write scripts, and suggest fixes. This model is supposed to run the design software itself, read the resulting timing and verification data, make changes, and loop — functioning, as one report put it, like a seasoned chip engineer. The reason general-purpose models haven’t cracked this before is straightforward: chip design is unforgiving. One bad routing decision can crater a chip’s yield, and the specialized software involved is proprietary. Training on the real tools, rather than on documentation about them, is the whole bet.
The guardrails: the physics still gets checked by physics
Synopsys isn’t handing the factory keys to a model. Ghazi told Reuters the AI’s output will be double-checked by Synopsys tools built on traditional computing techniques — the deterministic sign-off step that verifies whether a chip will actually work. “The model needs these guardrails in order to check the physics,” he said. “The need for validating with the highest level of fidelity, what we call sign-off or ground truth, is essential.”
The data terms matter just as much. Chip design files are among the most closely guarded trade secrets in tech, and The Decoder reports that customer data will be encrypted and excluded from model training. That’s the precondition for any semiconductor company to even consider letting an AI near its crown jewels.
What this means: AI is now designing its own supply chain
There’s an obvious loop here, and both executives are gesturing at it. Better chips mean better AI models; better AI models mean faster chip design. Ghazi called the agreement “an upside to our business given we’re delivering more value to the customer,” and made a point of saying it was “structured the agreement in a way that it will not be cannibalizing our business.”
For OpenAI, the deal buys it something it can’t get from web-scraped training data: hands-on fluency in the proprietary tooling of a $60-billion EDA market effectively split between Synopsys and Cadence. For Synopsys, it converts the AI hype wave into subscription revenue and a product that sells the value of its own tools back to its customers. The 7% pop in the stock and the raised guidance suggest Wall Street likes the arrangement.
The open questions are executional. Training a model to be genuinely useful inside EDA workflows — not just fluent in the vocabulary, but reliable at the judgment calls — is harder than it sounds, which is exactly why the sign-off guardrails exist. And the revenue-sharing formula based on “how well the model improves the design” will be worth watching: it’s an outcome-based price, and outcome-based pricing in enterprise software rarely stays simple.
For now, the industry’s most interesting experiment in AI tool-use is officially a business. Chip design, the most complex manufacturing process humans have invented, is about to get an AI intern.
FAQ
What is GPT-Synopsys? It’s a specialized AI model that OpenAI and Synopsys will develop together for chip design work. The model will be trained to operate Synopsys’ electronic design automation software, handling tasks from circuit descriptions in code-like hardware languages down to laying out billions of transistors.
How will OpenAI and Synopsys share revenue from the chip design AI? OpenAI will pay Synopsys a training subscription fee to learn how its tools work. When Synopsys customers use the finished product, the companies will split revenue based on how much the model improves chip design outcomes, according to Synopsys CEO Sassine Ghazi in an interview with Reuters.
When will GPT-Synopsys be available to chip engineers? There’s no announced release date. The companies describe the partnership as a multi-year collaboration, and The Decoder reports that early testing with semiconductor customers is underway and customer data will be encrypted and excluded from training.
Can you trust an AI to design a working chip? Not on its own, and Synopsys agrees. Everything GPT-Synopsys produces will be double-checked by conventional Synopsys verification tools — the sign-off step that proves a chip will physically work before it gets manufactured.
Sources: Reuters, The Decoder, Unite.AI, The Indian Express.